A high performance ST-Box based unified AES encryption/decryption architecture on FPGA-Reference-Cited by-同舟云学术

A high performance ST-Box based unified AES encryption/decryption architecture on FPGA

Published:2016-03 Issue: Volume:41 Page:37-46
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Kundi D.-S.,Aziz Arshad,Ikram Nassar

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference50 articles.

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