An energy-aware self-adaptive System-on-Chip architecture for real-time Harris corner detection with multi-resolution support-Reference-Cited by-同舟云学术

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An energy-aware self-adaptive System-on-Chip architecture for real-time Harris corner detection with multi-resolution support

Published:2017-03 Issue: Volume:49 Page:164-178
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Ahmed Hisham^ORCID,Sidek Othman

Funder

Universiti Sains Malaysia

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference60 articles.

1. ITRS, International Technology Roadmap for Semiconductors 2012 update, 2012. URL http://www.itrs2.net/2012-itrs.html.

2. Design for Embedded Image Processing on FPGAs;Bailey,2011

3. Cadence Design Systems, Xtensa Customizable Processors, 2016. URL http://ip.cadence.com/ipportfolio/tensilica-ip/xtensa-customizable.

4. Synopsys, Application Specific Instruction-Set Processors (ASIPs), 2016. URL https://www.synopsys.com/IP/PROCESSORIP/ASIP/Pages/default.aspx.

5. FPGA v/s DSP performance comparison for a VSC-based STATCOM control application;Sepulveda;Ind. Inf. IEEE Trans.,2013

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