Low power low area VLSI implementation of adaptive FIR filter using DA for decision feed back equalizer-Reference-Cited by-同舟云学术

Low power low area VLSI implementation of adaptive FIR filter using DA for decision feed back equalizer

Published:2022-09 Issue: Volume:93 Page:104577
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Vijetha K.,B. Rajendra Naik

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference30 articles.

1. Nonlinear acoustic echo cancellation with 2nd order adaptive Volterra filters;Alexander,1999

2. Applications of adaptive filtering to ECG analysisnoise cancellation and arrhythmia detection;Nitish V.;IEEE Trans. Biomed. Eng.,1991

3. A new low-power architecture design for distributed arithmetic unit in FIR filters implementation;Seyedeh Fatemeh;Circuits Systems Signal Process.,2014

4. Distributed arithmetic architectures for fir filters-a comparative review;Grande,2017

5. LUT optimization for distributed arithmetic-based block least mean square adaptive filter;Basant K.;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2016

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design Techniques for optimizing an Adaptive Decision Feedback Equalizer for 5G Communication;2024 International Conference on Knowledge Engineering and Communication Systems (ICKECS);2024-04-18

2. Design of Efficient Adaptive LMS Filter for Noise Reduction in ECG;2024 Second International Conference on Emerging Trends in Information Technology and Engineering (ICETITE);2024-02-22