1. High-Level Power Analysis and Optimization;Raghunathan,1998
2. System-Level Design Techniques for Energy-Efficient Embedded Systems;Schmitz,2004
3. Power-Constrained Testing of VLSI Circuits;Nicolici,2003
4. Low-Power CMOS VLSI Circuit Design;Roy,2000
5. T. Schuele, A.P. Stroele, Test scheduling for minimal energy consumption under power constraints, in: 19th IEEE VLS Test Symposium, USA, 2001, pp. 312–318.