1. Design flow for flip-flop grouping in data-driven clock gating;Wimer,2014
2. Design of two low power full adder cells using GDI structure and hybrid CMOS logic style;Foroutan;Integr. (Amst),2014
3. Practical Low Power Digital VLSI Design;Yeap,1998
4. Implementation of low power BCD adder using gate diffusion input cell;Saida,2016
5. Design and simulation of a low power RF front end for short range outdoor applications;Amin;Int. J. Mechatron. Electr. Comp. Technol.,2015