ProNoC: A low latency network-on-chip based many-core system-on-chip prototyping platform

Author:

Monemi Alireza,Tang Jia Wei,Palesi Maurizio,Marsono Muhammad N.

Funder

UTM

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference87 articles.

1. Route packets, not wires: on-chip interconnection networks;Dally,2001

2. The international technology roadmap for semiconductors (ITRS), 2011, (http://www.itrs2.net/itrs-reports.html).

3. Mapping on multi/many-core systems: survey of current and emerging trends;Singh,2013

4. Low-latency virtual-channel routers for on-chip networks;Mullins,2004

5. Express virtual channels: towards the ideal interconnection fabric;Kumar,2007

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