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Parallel programming model for the Epiphany many-core coprocessor using threaded MPI

  • Published:2016-06 Issue: Volume:43 Page:95-103
  • ISSN:0141-9331
  • Container-title:Microprocessors and Microsystems
  • language:en
  • Short-container-title:Microprocessors and Microsystems

Author:

Ross James A.,Richie David A.,Park Song J.,Shires Dale R.

Funder

Army Research Laboratory

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference40 articles.

1. “Epiphany Architecture Reference,” Adapteva, Rev. 14.03.11.

2. “E16G301 Epiphany 16-core Microprocessor,” Adapteva Inc., Lexington, MA. Datasheet Rev. 14.03.11.

3. “Parallella-1.x Reference Manual,” Adapteva, Boston Design Solutions, Ant Micro. Rev. 14.09.09.

4. “Kickstarting high-performance energy-efficient manycore architectures with Epiphany”;Olofsson,2014

5. Threaded MPI programming model for the Epiphany RISC array processor;Richie;J. Comput. Sci.,2015

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1. Domain-Decomposition Parallelization for Molecular Dynamics Algorithm with Short-Ranged Potentials on Epiphany Architecture;Lobachevskii Journal of Mathematics;2018-11

2. Modelo de simulação de cultura CSM-Cropsim: Wheat - uma abordagem paralela de execução;Revista Brasileira de Computação Aplicada;2018-09-21

3. Automatic Parallelization for Binary on Multi-core Platforms;Proceedings of the 2nd International Conference on Computer Science and Application Engineering - CSAE '18;2018

4. Many-core System-on-Chip: architectures and applications;Microprocessors and Microsystems;2016-06

5. An OpenSHMEM Implementation for the Adapteva Epiphany Coprocessor;OpenSHMEM and Related Technologies. Enhancing OpenSHMEM for Hybrid Environments;2016
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