Exploring the design-space for FPGA-based implementation of RSA-Reference-Cited by-同舟云学术

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Exploring the design-space for FPGA-based implementation of RSA

Published:2004-05 Issue:4 Volume:28 Page:183-191
ISSN:0141-9331
Container-title:Microprocessors and Microsystems
language:en
Short-container-title:Microprocessors and Microsystems

Author:

Cilardo A.,Mazzeo A.,Romano L.,Saggese G.P.

Publisher

Elsevier BV

Subject

Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software

Reference17 articles.

1. Handbook of Applied Cryptography;Menezes,1996

2. A method for obtaining digital signature and public-key cryptosystems;Rivest;Commun. ACM,1978

3. An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists;Elbirt;IEEE Trans. VLSI Syst.,2001

4. Ç.K. Koç, High-speed RSA implementation, Technical Report TR 201, RSA Laboratories, 1994.

Cited by 19 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. RSA Processor for Concurrent Cryptographic Transformations;Energy-Efficient Modular Exponential Techniques for Public-Key Cryptography;2021

2. High level montgomery modular multiplier for CSA architecture;Materials Today: Proceedings;2020-12

3. Under Quantum Computer Attack: Is Rainbow a Replacement of RSA and Elliptic Curves on Hardware?;Security and Communication Networks;2018

4. Secure FPGA as a Service — Towards Secure Data Processing by Physicalizing the Cloud;2017 IEEE Trustcom/BigDataSE/ICESS;2017-08

5. Design of RSA processor for concurrent cryptographic transformations;Microelectronics Journal;2017-05

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