Performance optimization for parallel systems with shared DWM via retiming, loop scheduling, and data placement

Author:

Gao Siyuan,Gu Shouzhen,Xu Rui,Sha Edwin Hsing-Mean,Zhuge Qingfeng

Funder

Fundamental Research Funds for the Central Universities

National Natural Science Foundation of China

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference22 articles.

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2. An energy-efficient nonvolatile in-memory computing architecture for extreme learning machine by domain-wall nanowire devices;Wang;J. IEEE Trans. Nanotechnol.,2015

3. AIMR: an adaptive page management policy for hybrid memory architecture with NVM and DRAM;Sun,2015

4. Y. Zhang, J. Zhan, et al., Dynamic memory management for hybrid dram-nvm main memory systems, in: 13th International Conference on Embedded Software and Systems, IEEE, pp. 148–153.

5. W. Yuhao, H. Yu, An ultralow-power memory-based big-data computing platform by nonvolatile domain-wall nanowire devices, in: Proceedings of the 2013 International Symposium on Low Power Electronics and Design, IEEE, pp. 329–334.

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