Efficient task spawning for shared memory and message passing in many-core architectures

Author:

Zaib Aurang,Wild Thomas,Herkersdorf Andreas,Heisswolf Jan,Becker Jürgen,Weichslgartner Andreas,Teich Jürgen

Funder

German Research Foundation

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference25 articles.

1. Network interface with task spawning support for noc-based DSM architectures;Zaib,2015

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4. Intel Xeon Phi Coprocessor High-performance Programming;Jeffers,2013

5. Tile-gx100 manycore processor: Acceleration interfaces and architecture;Ramey,2011

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. DySHARQ: Dynamic Software-Defined Hardware-Managed Queues for Tile-Based Architectures;International Journal of Parallel Programming;2020-11-20

2. SHARQ: Software-Defined Hardware-Managed Queues for Tile-Based Manycore Architectures;Lecture Notes in Computer Science;2019

3. Invasive Computing;Invasive Computing for Mapping Parallel Programs to Many-Core Architectures;2017-12-30

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