Author:
Heikkinen Jari,Takala Jarmo
Subject
Hardware and Architecture,Software
Reference29 articles.
1. A VLIW architecture for a trace scheduling compiler;Colwell;IEEE Trans. Comput.,1988
2. Expression-tree-based algorithms for code compression on embedded RISC architectures;Araújo;IEEE Trans. VLSI Syst.,2000
3. A. Wolfe, A. Chanin, Executing compressed programs on an embedded RISC architecture, in: Proc. 25th Ann. Int. Symp. Microarchitecture, Portland, OR, USA, 1992, pp. 81–91.
4. H. Lekatsas, W. Wolf, Code compression for embedded systems, in: Proc. 35th Conf. Design Automation, San Francisco, CA, USA, 1998, pp. 516–521.
5. C. Lefurgy, P. Bird, I.-C. Chen, T. Mudge, Improving code density using compression techniques, in: Proc. 30th Ann. Int. Symp. Microarchitecture, Research Triangle Park, NC, USA, 1997, pp. 194–203.
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