1. Improving functional density using run-time circuit reconfiguration;Wirthlin;IEEE Trans. Very Large Scale Integrat. Syst.,1998
2. Design advantages of run-time reconfiguration;Guccione,1999
3. Xilinx, Virtex-II Pro Platform FPGA Handbook, October 2002.
4. Atmel, FPSLIC 5–40K gates of AT40K FPGA with 8-bit AVR microcontroller, up to 36k bytes of SRAM and on-chip JTAG ICE, datasheet, ref. 1138H-FPSLI-6/05, 2005.
5. Xilinx, MicroBlaze Processor Reference Guide, June 2004.