Subject
Hardware and Architecture,Software
Reference27 articles.
1. I. San, N. At, On increasing the computational efficiency of long integer multiplication on FPGA, in: Proceedings of the 2012 IEEE 11th International Conference on Trust, Security and Privacy in Computing and Communications, Washington, DC, USA, 2012, pp. 1149–1154.
2. Utilizing hard cores of modern FPGA devices for high-performance cryptography;Güneysu;Journal of Cryptographic Engineering,2011
3. F. de Dinechin, B. Pasca, Large multipliers with fewer DSP blocks, in: Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on, 2009, pp. 250–255.
4. J. von zur Gathen, J. Shokrollahi, Efficient FPGA-based karatsuba multipliers for polynomials over f2, in: B. Preneel, S.E. Tavares (Eds.), Selected Areas in Cryptography, 2005, pp. 359–369.
5. E.-H. Wajih, M. Mohsen, Z. Medien, B. Belgacem, Efficient hardware architecture of recursive Karatsuba-Ofman multiplier, in: Design and Technology of Integrated Systems in Nanoscale Era, 2008. DTIS 2008. 3rd International Conference on, 2008, pp. 1–6.
Cited by
23 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献