GABES: A genetic algorithm based environment for SEU testing in SRAM-FPGAs

Author:

Bernardeschi Cinzia,Cassano Luca,Cimino Mario G.C.A.,Domenici Andrea

Publisher

Elsevier BV

Subject

Hardware and Architecture,Software

Reference65 articles.

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3. J. Borecky, P. Kubalik, H. Kubatova, Reliable railway station system based on regular structure implemented in FPGA, in: Proceedings of the 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD ’09), 2009, pp. 348–354.

4. V. Winkler, J. Detlefsen, U. Siart, J. Buchler, M. Wagner, FPGA-based signal processing of an automotive radar sensor, in: Proceedings of the First European Radar Conference (EURAD), 2004, pp. 245–248.

5. J. Henaut, D. Dragomirescu, R. Plana, FPGA based high date rate radio interfaces for aerospace wireless sensor systems, in: Proceedings of the Fourth International Conference on Systems (ICONS ’09), 2009, pp. 173–178.

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