Vedic algorithm for cubic computation and VLSI implementation-Reference-Cited by-同舟云学术

Vedic algorithm for cubic computation and VLSI implementation

Published:2017-10 Issue:5 Volume:20 Page:1494-1499
ISSN:2215-0986
Container-title:Engineering Science and Technology, an International Journal
language:en
Short-container-title:Engineering Science and Technology, an International Journal

Author:

Kumar Deepak^ORCID,Saha Prabir,Dandapat Anup

Publisher

Elsevier BV

Subject

Metals and Alloys,Computer Networks and Communications,Fluid Flow and Transfer Processes,Hardware and Architecture,Mechanical Engineering,Biomaterials,Civil and Structural Engineering,Electronic, Optical and Magnetic Materials

Reference13 articles.

1. Low power square and cube architectures using vedic sutras;Kunchigi,2014

2. Design and analysis of A novel parallel square and cube architecture based on ancient indian vedic mathematics;Thapliyal,2005

3. Parallel square and cube computations;Liddicoat,2000

4. Partial product reduction for parallel cubing;Stine,2007

5. Comparing squaring and cubing units with multipliers;Deshpande,2012

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1. An Organized Literature Review on Various Cubic Root Algorithmic Practices for Developing Efficient VLSI Computing System—Understanding Complexity;Artificial Intelligence Applications and Reconfigurable Architectures;2023-02-10

2. Efficient Approximate Cubing Function Circuits Based on PWL;2022 IEEE 5th International Conference on Electronics Technology (ICET);2022-05-13

3. Efficient Hardware Implementation of Cube Architecture using Yavadunam Sutra on FPGA;2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS);2021-08-09

4. Integration of Vedic Sutras for Cubic Computation;Lecture Notes in Electrical Engineering;2021

5. Methodologies for CAM and ADC design;CSI Transactions on ICT;2019-06