Author:
Chakraborty Amrita,Al-Mamun Mohammad,Orlowski Marius
Abstract
Building nonvolatile memory such as resistive random access memory (ReRAM) directly into a CMOS backend (BEOL) would reduce latency in connectivity-constrained devices and reduce chip’s footprint by stacking non-volatile memory (NVM) on top of the logic circuits. This co-integration is facilitated by a broad commonality between ReRAM and BEOL as both rely on the same basic metal–insulator–metal (MIM) structure. One good candidate for a ReRAM cell is the Cu/TaOx/Pt device. As platinum (Pt) is not an economic choice, a BEOL-compatible replacement is desirable. A good candidate to replace Pt electrode is ruthenium (Ru), currently being used as a liner/diffusion barrier in sub-15 nm technology nodes and soon to supplant tungsten as via, and copper (Cu) as interconnect materials. We report on extensive characterization of a Cu/TaOx/Ru device and compare its performance and reliability with extant ReRAM devices. Against the background of well-characterized non-Ru ReRAM devices, Cu/TaOx/Ru cell constitutes a micro-laboratory for testing a wide range of Ru properties with the Cu nanofilament as a probe. Since the temperature of the cell can be controlled internally from 27°C to ∼1100°C, thin Ru layers can be subjected to much more comprehensive tests than it is possible in the interconnect MIM structures and reveal and confirm interesting material properties, including the impact of embedment.
Reference46 articles.
1. Liu T, Kang K, El-Helw S, Potnis T, Orlowski M. Physics of the voltage constant in multilevel switching of conductive bridge resistive memory. Japanese Journal of Applied Physics. 2013;52:084202. DOI: 10.7567/JJAP.52.084202
2. Al-Mamun M, Orlowski M. Challenges to implement resistive memory cells in the CMOS BEOL. ECS Transactions. 2017;80(6):13-23
3. Benasconi R, Magagnin L. Review-ruthenium as diffusion barrier layer in electronic interconnects. Journal of ECS. 2019;166(1):D3219-D3225
4. Wen LG, Adelmann C, Pedreira OV, Dutta S, Popovici M. Ruthenium metallization for advanced interconnects. IEEE Internet Interconnect Technique. 2016;2016:34-36
5. Zahedmanesh H, Gonzales VV, Tokei Z. Nano-ridge bending during conformal ruthenium metallization. ACS Applied Nano Materials. 2021;4:5643-5648
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Thermal Reliability Issues in ReRAM Memory Arrays;Memristors - the Fourth Fundamental Circuit Element - Theory, Device, and Applications [Working Title];2023-09-05