Power Consumption in CMOS Circuits

Author:

Luet Ng Len,Ho Yeap Kim,Wan Ching Goh Magdalene,Dakulagi Veerendra

Abstract

In this chapter, we explain the two types of power consumption found in a complementary metal-oxide-semiconductor (CMOS) circuit. In general, a CMOS circuit tends to dissipate power at all times—be it active or inactive. The power consumed by the circuit when it is performing computational tasks is known as dynamic power. On the contrary, the power lost due to current leakage during which the circuit is dormant is referred to as static power. By carefully and properly designing the circuit, current leakage can be suppressed to its minimum. Hence, dynamic power consumption is usually significantly higher than its static counterpart. Some of the techniques that could be adopted to save dynamic power consumption include reducing the supply voltage, clock frequency, clock power, and dynamic effective capacitance. By probing into the activity factors of the design modules, the techniques can be applied to those with high power consumption.

Publisher

IntechOpen

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