Hardware Implementation of Chaotic Zigzag Map Based Bitwise Dynamical Pseudo Random Number Generator on Field-Programmable Gate Array-Reference-Cited by-同舟云学术

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Hardware Implementation of Chaotic Zigzag Map Based Bitwise Dynamical Pseudo Random Number Generator on Field-Programmable Gate Array

Published:2021-01-27 Issue: Volume: Page:243-254
ISSN:2232-6979
Container-title:Informacije MIDEM - Journal of Microelectronics, Electronic Components and Materials
language:en
Short-container-title:Informacije MIDEM

Author:

Publisher

Drustvo MIDEM

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Generating pseudo-random numbers with a Brownian system;Integration;2024-05

2. FPGA modeling of a novel fully-synthesizable and secure TRNG based on key-dependent s-box;Digital Signal Processing;2023-05

3. A chaotic PRNG tested with the heuristic Differential Evolution;Integration;2023-05

4. A high speed pseudo-random bit generator driven by 2D-discrete hyperchaos;Chaos, Solitons & Fractals;2023-02

5. Hardware implementation of a strong pseudorandom number generator based block‐cipher system for color image encryption and decryption;International Journal of Circuit Theory and Applications;2022-08-27

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