A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs-Reference-Cited by-同舟云学术

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A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs

Published:2021-06-13 Issue: Volume: Page:
ISSN:
Container-title:2021 Symposium on VLSI Circuits
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Author:

Ko Jae-Young,Huh Yeunhee,Ko Min-Woo,Kang Gyeong-Gu,Cho Gyu-Hyeong,Kim Hyun-Sik

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9492225/9492226/09492478.pdf?arnumber=9492478

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 5V-Input Sub-1V-Output Single-Inductor Multi-Path Hybrid Buck Converter Achieving 96.1% Peak Efficiency with 250mΩ DCR Inductor;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and C_OUT-Free Operations;IEEE Journal of Solid-State Circuits;2024-04

3. 28.5 A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2A/mm² Current-Density FoM;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

4. 8.8 A 97.18% Peak-Efficiency Asymmetrically Implemented Dual-phase (AID) Converter with a full Voltage-Conversion Ratio (VCR) between 0-and-1;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

5. Development and challenges of high-efficiency highly-integrated power management integrated circuits;SCIENTIA SINICA Informationis;2024-01-01

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