Author:
Prasad Rohit,Das Satyajit,Martin Kevin J. M.,Tagliavini Giuseppe,Coussy Philippe,Benini Luca,Rossi Davide
Cited by
19 articles.
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1. Coarse-grained reconfigurable architectures for radio baseband processing: A survey;Journal of Systems Architecture;2024-09
2. ALPACA: An Accelerator Chip for Nested Loop Programs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
3. R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA;ACM Transactions on Reconfigurable Technology and Systems;2024-05-10
4. VecPAC: A Vectorizable and Precision-Aware CGRA;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
5. FLEX: Introducing FLEXible Execution on CGRA with Spatio-Temporal Vector Dataflow;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28