Fast and Accurate DRAM Simulation: Can we Further Accelerate it?

Author:

Feldmann Johannes1,Kraft Kira1,Steiner Lukas1,Wehn Norbert1,Jung Matthias2

Affiliation:

1. Technische Universität Kaiserslautern,Microelectronic Systems Design Research Group,Kaiserslautern,Germany

2. Fraunhofer IESE,Embedded Systems Division,Kaiserslautern,Germany

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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3. IT-DSE: Invariance Risk Minimized Transfer Microarchitecture Design Space Exploration;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

4. Multifidelity Memory System Simulation in SST;Proceedings of the International Symposium on Memory Systems;2023-10-02

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