PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
Author:
Affiliation:
1. Peng Cheng Laboratory,China
2. The University of Auckland,New Zealand
3. Shanghai Jiao Tong University,China
4. The Hong Kong University of Science and Technology,Hong Kong, China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9774496/9774497/09774682.pdf?arnumber=9774682
Reference20 articles.
1. Vivado design suite tutorial: Power Analysis and Optimization;Xilinx White Paper,2019
2. UltraScale Architecture Low Power Technology Overview;kolluri;Xilinx White Paper,2015
3. Accurate operation delay prediction for FPGA HLS using graph neural networks
4. Semi-supervised classification with graph convolutional networks;kipf;Proc of ICLR,0
5. Inductive representation learning on large graphs;hamilton;Proc of NeurIPS,0
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