Towards Performance Optimization of Ring Oscillator PUF using Xilinx FPGA-Reference-Cited by-同舟云学术

Towards Performance Optimization of Ring Oscillator PUF using Xilinx FPGA

Published:2022-06-22 Issue: Volume: Page:
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Container-title:2022 17th Iberian Conference on Information Systems and Technologies (CISTI)
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Author:

Kareem Husam¹,Dunaev Dmitriy¹

Affiliation:

1. Budapest University of Technology and Economics,Faculty of Electrical Engineering and Informatics,Department of Automation and Applied Informatics,Műegyetem rkp. 3,Hungary,H-1111

Funder

Innovation Fund

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9819948/9819977/09820289.pdf?arnumber=9820289

Reference20 articles.

1. A Ring Oscillator-Based PUF With Enhanced Challenge-Response Pairs

2. A Lightweight Configurable XOR RO-PUF Design Based on Xilinx FPGA

3. Improving the quality of a Physical Unclonable Function using configurable Ring Oscillators

4. Vivado Design Suite User Guide: Implementation UG904 (v2020.2);Xilinx,2021

5. Implementation of Delay-Based PUFs on Altera FPGAs

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