Author:
Bussa Pavan Kumar,Goeders Jeffrey,Wilton Steven J. E.
Cited by
8 articles.
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1. Incremental Verilog Parser;2023 International Symposium of Electronics Design Automation (ISEDA);2023-05-08
2. mu-grind;Proceedings of the International Conference on Parallel Architectures and Compilation Techniques;2022-10-08
3. StateLink: FPGA System Debugging via Flexible Simulation/Hardware Integration;2021 International Conference on Field-Programmable Technology (ICFPT);2021-12-06
4. Stop and Look: A Novel Checkpointing and Debugging Flow for FPGAs;IEEE Transactions on Computers;2021
5. StateMover;Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2020-02-23