Multi-Layer Perceptron Hardware Accelerator on RISC-V Processor-Reference-Cited by-同舟云学术

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Multi-Layer Perceptron Hardware Accelerator on RISC-V Processor

Published:2021-11-25 Issue: Volume: Page:
ISSN:
Container-title:2021 13th International Conference on Electrical and Electronics Engineering (ELECO)
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Author:

Koca Nazim Altar,Yildiz Berkay,Demirkol Yusuf Caner,Ors Berna

Funder

TUBITAK

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9677617/9677567/09677758.pdf?arnumber=9677758

Reference33 articles.

1. Scratchpad memory

2. RV-CNN: Flexible and Efficient Instruction Set for CNNs Based on RISC-V Processors

3. Understanding dropout;baldi;Advances in neural information processing systems,0

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Soc Design of Intelligent Recognition Based on RISC-V;2022 International Conference on Automation, Robotics and Computer Engineering (ICARCE);2022-12-16

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