Process deviation based electrical model of voltage controlled magnetic anisotropy magnetic tunnel junction and its application in read/write circuits

Abstract

As one of the primary elements in magnetoresistive random access memory (MRAM), voltage controlled magnetic anisotropy magnetic tunnel junction (VCMA-MTJ) has received wide attention due to its fast read and write speed, low power dissipation, and compatibility with standard CMOS technology. However, with the downscaling of VCMA-MTJ and the increasing of storage density of MRAM, the effect of process deviation on the characteristics of MTJ becomes more and more obvious, which even leads to Read/Write (R/W) error in VCMA-MTJ circuits. Taking into account the depth deviation of the free layer (<i>γ</i>_tf) and the depth deviation of the oxide barrier layer (<i>γ</i>_tox) in magnetron sputtering technique as well as the etching process stability factor (<i>α</i>) caused by the sidewall re-deposition layer in the ion beam etching process, the electrical model of VCMA-MTJ with process deviation is presented in the paper. It is shown that the VCMA-MTJ cannot achieve the effective reversal of the magnetization direction when <i>γ</i>_tf ≥ 13% and <i>γ</i>_tox ≥ 11%. The precession of magnetization direction in VCMA-MTJ also becomes instable when <i>α</i> ≤ 0.7. Furthermore, the electrical model of VCMA-MTJ with process deviation is also applied to the R/W circuit to study the effect of process deviation on the R/W error in the circuit. Considering the fact that all of <i>γ</i>_tf, <i>γ</i>_tox, and α follow Gauss distribution, The 3<i>σ</i>/<i>μ</i> is adopted to represent the process deviation, with using Monte Carlo simulation, where <i>σ</i> is the standard deviation, and <i>μ</i> is the average value. It is shown that the write error of the circuit goes up to 30 % with 3<i>σ</i>/<i>μ</i> of 0.05 and the voltage (<i>V</i>_b) of 1.15 V. At the same time, the read error of the circuit is 20% with 3<i>σ</i>/<i>μ</i> of 0.05 and driving voltage (<i>V</i>_dd) of 0.6 V. Both the read error rate and the write error rate of the VCMA-MTJ circuit increase as process deviation increases. It is found that the write error rate can be effectively reduced by increasing <i>V</i>_b and reducing the voltage pulse width (<i>t</i>_pw). The increasing of <i>V</i>_dd is helpful in reducing the read error rate effectively. Our research presents a useful guideline for designing and analyzing the VCMA-MTJ and VCMA-MTJ read/write circuits.