A analytic model for the threshold-voltage of novel high-speed semiconductor device IMOS

Abstract

A threshold voltage model is created by analyzing differents distributions of surface electric field and the condition of avalanche breakdown, based on the structure of a novel high speed semiconductor device p-IMOS in this paper. Model verification is carried out using the 2D device simulator ISE. By analyzing the model, the dependences of threshold voltage on drain-source voltage, Si layer thickness and gate length are studied. The results of the model are in good agreement with experimental results and ISE simulation results. The proposed model can also be easily used for the reasonable analysis and the design of p-IMOS.