A compact model of substrate resistance for deep sub-micron gate grounded NMOS electrostatic discharge protection device

Author:

Wu Xiao-Peng ,Yang Yin-Tang ,Gao Hai-Xia ,Dong Gang ,Chai Chang-Chun ,

Abstract

The current controlled voltage source model of substrate parasitic resistance of deep sub-micron electrostatic discharge protection device is optimized by considering the effect of conductance modulation. A compact macro-model of substrate resistance is presented according to the characteristics of lightly doped bulk substrate and heavily doped substrate with a lightly doped epitaxial layer, which is scalable with the layout dimension. The experimental model parameters of devices with various spaces between source and substrate diffusion can be extracted by device simulation. The breakdown behavior of gate grounded negative-channel metal oxide semiconductor shows the effectiveness of this method. In the meantime, the simulation time-consuming of the compact model is only 7% that of the device simulation software.

Publisher

Acta Physica Sinica, Chinese Physical Society and Institute of Physics, Chinese Academy of Sciences

Subject

General Physics and Astronomy

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