Design of High Performance and Power Efficient Flash ADC

Abstract

In this paper, Flash Analog to digital converter is implemented. The designed Flash ADC consists of a resistive ladder network, comparators, the thermometer to a binary encoder and the entire design is carried out using Tanner tools employing 180nm technology. The reference voltage applied to the resistive ladder network is 1.8V. A two-stage operational amplifier is used as a comparator in the flash ADC. Here, we are modifying the structure of operational Amplifier using Power Gating Technique. Binary code is obtained from the thermometer code by utilizing a Mux based encoder by designing the MUX in domino Logic. The major problem that usually appears in flash ADC is as the number of resolution bits increases, the Area, as well as the power consumption of the circuit, also increases. In this paper, we principally concentrated to lessen the propagation delay of the ADC by optimizing encoder circuitry. With the purpose of reducing latency, Encoder is implemented using 2:1 mux based on Pseudo NMOS Logic. Performance parameters of Flash ADC such as delay as well as average power are calculated and compared.