Modeling functional control unit by matrix indicator on basis of programmable logic integrated circuit

Abstract

The article presents the process of simulation of the functional control unit of a matrix indicator on the basis of a programmable logic integrated circuit in the Xilinx Vivado Design Suite tool programming environment. Analysis and synthesis of the hardware language constructs, as well as developing RTL models were carried out using the Xilinx ISE software. There have been defined the functional modules common to the matrix indicator control unit: a finite state machine that generates a sequence of characters; a matrix indicator control unit that outputs a sequence of characters to a matrix indicator generating a finite automaton; a button bounce filter; frequency divider. A logic unit model combining functional nodes has been realized. Xilinx ISE CAD produced an RTL model that shows interaction of the nodes and the appearance of the top level. The matrix indicator control unit is presented as four interrelated devices: a column counter that enumerates the columns; a column decoder that takes input values and produces the value "1" only to one of the outputs, the number of which is equal to the number of the column whose value is put to the input; a character code register which receives, stores and transmits character codes; read-only memory which stores encodings of lines for sending an information signal in case of arrival of a particular word or a column. The specific features of implementing the modules on programmable logic are considered. A test module developed in the Verilog language was designed for verification, which is a step-by-step input of values and delays between input. Testing the modules that make up the matrix indicator control unit was carried out.