Abstract
Abstract
One of the alternatives to the current silicon technology, Complementary Metal Oxide Semiconductor (CMOS) is Quantum-dot Cellular Automata (QCA). Test generation is an unavoidable process in the CMOS design flow. This possibility of test generation must be explored and applied to the QCA as the QCA is a novel and nanoscale technology. Therefore, in this paper, the test generation process is explored and implemented for QCA combinational circuits.
The FAN (A Fanout Oriented) Automatic Test pattern Generator (ATPG) algorithm is extended for QCA (FANQ). The proposed FANQ ATPG is developed for faults caused by Multiple Missing Cells (MMC) along with single missing cell defect in QCA primitives and circuits which is not reported in earlier QCA based ATPG. The previously proposed testing properties and testability measures are incorporated in the FANQ ATPG for its effectiveness. The generated test vectors are compacted and tested on previously synthesized, QCA-oriented Microelectronics Center for North Carolina (MCNC) benchmark circuits. Further, the generated test vectors are also validated at the layout level to demonstrate the correctness of ATPG. The proposed ATPG for QCA combinational circuits required fewer test vectors for the stuck at fault model compared to the available QCA ATPG.
Publisher
Research Square Platform LLC
Cited by
1 articles.
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