Enhancement of ON-Current in Modified TMG Vertical TFET with Split Pockets

Abstract

Abstract This paper emphasizes the configuration of an N+ Si pocket overlay in a Vertical Tunnel Field Effect Transistor (VTFET), incorporating a gate-stacking process. In this design, the source pocket is divided into two segments with differing doping concentrations, specifically low and high concentrations. In Tunnel Field Effect Transistors (TFETs), the source pocket plays a vital role in augmenting the ON-state (ION) current. The vertical structure is implemented to alleviate scaling constraints and improve the device's scalability. To address ambipolarity, the gate electrode is divided into three segments with optimal work-functions of 4.15 eV, 4.30 eV, and 4.15 eV for the Auxiliary gate, Control gate, and Tunneling gate, respectively. The sub-threshold slope of short-channel Tunnel Field Effect Transistors (TFETs) will experience enhancement through a gate-stacking procedure employing high-k gate oxides, such as HfO2, in combination with SiO2 in the stack. Additionally, the pocket overlay positioned in the center of the source-channel region, utilizing low band gap group III-V materials, contributes to further improvements in the current ratio (ION / IOFF) and sub-threshold slope. In the presented device, the measured ION current and IOFF current are 8.14 x 10-3 A/μm and 5.37 x 10-11 A/μm, respectively. The threshold voltage is reduced to 0.2V. These achieved parameters establish the N+ Si pocket-doped Triple Metal Gate (TMG) VTFET as well-suited for applications demanding low power consumption.