Impact of P pocket in Doping Less Tunnel Field Effect Transistor

Abstract

Abstract In this paper, we have proposed the doping less dual material double gate Tunnel field-effect transistor with a P+ pocket (PP- DMG TFET). This gate engineered technique is ordinarily used in a MOSFET for performance augmentation. The P+ pocket is embedded at the source side to enhance the performance of pocket engineered PP- DMG TFET device. This paper compares the performance of four DG-TFET based devices i.e. single material gate TFET (SMG), single material gate with P+ pocket TFET (PP-SMG), dual material gate TFET (DMG DG), dual material gate with P+ pocket (PP-DMG). Electrostatic doping based on charge plasma notion forms the requisite structure n-i-p + for tunneling formed on a thin intrinsic silicon layer. The proposed device (PP-DMG) has a high on-current capability, high ON/OFF ratio and lower point subthreshold of 15.3 mV/dec, and an average subthreshold of 18.6 mV/dec. The analog parameters evaluated include transconductance (gm) and cutoff frequency (fT) have shown impressive improvement. We have also discussed the device efficiency and transconductance frequency product (TFP) finally we have done the linearity and distortion analysis on parameters such as VIP2, VIP3, IIP3, and IMD3 analysis.