1. 1) Sakurai, Y., Suzuki, H., Maemura, K. and Takakura, S.: Present status of the embedded CPU in SoC design, NEC Technical Journal, Vol.1, No.5, pp.38-41 (2006).
2. 2) Borkar, S.: Designing reliable systems from unreliable components: The challenges of transistor variability and degradation, IEEE Micro, Vol.25, No.6, pp.10-16 (2005).
3. 3) Narayanan, V. and Xie, Y.: Reliability concerns in embedded system designs, Computer, Vol.39, No.1, pp.118-120 (2006).
4. 4) Van Hieu, N.: Multilevel interconnect reliability on the effects of electrothermomechanical stresses, PhD thesis, Univ. of Twente, Netherlands (2004).
5. 5) Brodt, J.: Revving up with automotive multicore, EDN Magazine (May 2008). http://www.edn.com/article/CA6528579.html