1. [1] Ueda, K., Sakanushi, K., Takeuchi, Y. and Imai, M.: Architecture-level performance estimation method based on system-level profiling, IEE P-Comput. Dig. T., Vol.152, No.1, pp.12-19 (2005).
2. [2] Verkest, D., Rompaey, K., Bolsens, I. and Man, H.: CoWare-A design environment for heterogeneous hardware/software systems, Des. Autom. Embed. Syst., Vol.1, No.4, pp.357-386 (1996).
3. [3] Honda, S., Wakabayashi, T., Tomiyama, H. and Takada, H.: RTOS-Centric Hardware/Software Cosimulator for Embedded System Design, Proc. CODES+ISSS'04, pp.158-163 (2004).
4. [4] Balarin, F., Lavagno, L., Passerone, C., Sangiovanni-Vincentelli, A., Watanabe, Y. and Yang, G.: Concurrent Execution Semantics and Sequential Simulation Algorithms for the Metropolis Meta-model, Proc. CODES'02, pp.13-18 (2002).
5. [5] Buck, J., Ha, S., Lee, E.A. and Messerschmitt, D.G.: Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, Int. Journal of Computer Simulation, Vol.4, (1994).