Affiliation:
1. CITI / Departamento de Informática Faculdade de Ciências e Tecnologia Universidade Nova de Lisboa - Caparica, Portugal
Abstract
Concurrent programs may suffer from concurrency anomalies that may lead to
erroneous and unpredictable program behaviors. To ensure program correctness,
these anomalies must be diagnosed and corrected. This paper addresses the
detection of both low- and high-level anomalies in the Transactional Memory
setting. We propose a static analysis procedure and a framework to address
Transactional Memory anomalies. We start by dealing with the classic case of
low-level dataraces, identifying concurrent accesses to shared memory cells
that are not protected within the scope of a memory transaction. Then, we
address the case of high-level dataraces, bringing the programmer?s attention
to pairs of memory transactions that were misspecified and should have been
combined into a single transaction. Our framework was applied to a set of
programs, collected form different sources, containing well known low- and
high-level anomalies. The framework demonstrated to be accurate, confirming
the effectiveness of using static analysis techniques to precisely identify
concurrency anomalies in Transactional Memory programs.
Publisher
National Library of Serbia
Cited by
3 articles.
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1. Verifying Concurrent Programs Using Contracts;2017 IEEE International Conference on Software Testing, Verification and Validation (ICST);2017-03
2. TSXProf: Profiling Hardware Transactions;2015 International Conference on Parallel Architecture and Compilation (PACT);2015-10
3. The Quest for Precision: A Layered Approach for Data Race Detection in Static Analysis;Automated Technology for Verification and Analysis;2013