A 60-nm-thick enhancement mode In0.65Ga0.35As/InAs/In0.65Ga0.35As high-electron-mobility transistor fabricated using Au/Pt/Ti non-annealed ohmic technology for low-power logic applications-Reference-Cited by-同舟云学术

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A 60-nm-thick enhancement mode In0.65Ga0.35As/InAs/In0.65Ga0.35As high-electron-mobility transistor fabricated using Au/Pt/Ti non-annealed ohmic technology for low-power logic applications

Published:2016-01-14 Issue:2 Volume:9 Page:026502
ISSN:1882-0778
Container-title:Applied Physics Express
language:
Short-container-title:Appl. Phys. Express

Author:

Fatah Faiz Aizad,Lin Yueh-Chin,Liu Ren-Xuan,Yang Kai-Chun,Lin Tai-We,Hsu Heng-Tung,Yang Jung-Hsiang,Miyamoto Yasuyuki,Iwai Hiroshi,Hu Chenming Calvin,Salahuddin Sayeef,Chang Edward Yi

Publisher

IOP Publishing

Subject

General Physics and Astronomy,General Engineering

Reference28 articles.

1. Opportunities and challenges of III-V nanoelectronics for future high-speed, low-power logic applications

2. Nanotechnology goals and challenges for electronic applications

3. Simultaneous achievement of high-speed and low-noise performance of pseudomorphic InGaAs/InAlAs HEMTs

4. Extremely High gm> 2.2 S/mm and fT> 550 GHz in 30-nm Enhancement-Mode InP-HEMTs with Pt/Mo/Ti/Pt/Au Buried Gate

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Evaluation of an InAs HEMT with source-connected field plate for high-speed and low-power logic applications;Solid-State Electronics;2019-07

2. Evaluation of a 100-nm Gate Length E-Mode InAs High Electron Mobility Transistor With Ti/Pt/Au Ohmic Contacts and Mesa Sidewall Channel Etch for High-Speed and Low-Power Logic Applications;IEEE Journal of the Electron Devices Society;2018

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