Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-klast devices and enabling a simplified scalable CMOS integration scheme-Reference-Cited by-同舟云学术

Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-klast devices and enabling a simplified scalable CMOS integration scheme

Published:2014-01-01 Issue:4S Volume:53 Page:04EA04
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:
Short-container-title:Jpn. J. Appl. Phys.

Author:

Veloso Anabela,Boccardi Guillaume,Ragnarsson Lars-Åke,Higuchi Yuichi,Arimura Hiroaki,Lee Jae Woo,Simoen Eddy,Cho Moon Ju,Roussel Philippe J.,Paraschiv Vasile,Shi Xiaoping,Schram Tom,Chew Soon Aik,Brus Stephan,Dangol Anish,Vecchio Emma,Sebaai Farid,Kellens Kristof,Heylen Nancy,Devriendt Katia,Dekkers Harold,Van Ammel Annemie,Witters Thomas,Conard Thierry,Vaesen Inge,Richard Olivier,Bender Hugo,Athimulam Raja,Chiarella Thomas,Thean Aaron,Horiguchi Naoto

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Reference43 articles.

1. A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging

2. A 32nm logic technology featuring 2^nd-generation high-k + metal-gate transistors, enhanced channel strain and 0.171μm² SRAM cell size in a 291Mb array

3. High performance 32nm logic technology featuring 2^nd generation high-k + metal gate transistors

4. RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

5. Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Novel Band-Edge Work Function Performance Modulation via NPT with PMOS1st/NMOS1st Laminated Stack for PMOS Low Power Target;ECS Journal of Solid State Science and Technology;2020-11-02

2. Comparative Investigation of Flat-Band Voltage Modulation by Nitrogen Plasma Treatment for Advanced HKMG Technology;ECS Journal of Solid State Science and Technology;2018

3. (Invited) Challenges on Surface Conditioning in 3D Device Architectures: Triple-Gate FinFETs, Gate-All-Around Lateral and Vertical Nanowire FETs;ECS Transactions;2017-08-15

4. Investigation of low-frequency noise of 28-nm technology process of high-k/metal gate p-MOSFETs with fluorine incorporation;Solid-State Electronics;2016-01

5. Importance of Si surface flatness to realize high-performance Si devices utilizing ultrathin films with new material system;IEICE Electronics Express;2014