Memory-efficient and high-speed split-radix FFT/IFFT processor based on pipelined CORDIC rotations-Reference-Cited by-同舟云学术

Memory-efficient and high-speed split-radix FFT/IFFT processor based on pipelined CORDIC rotations

Published:2006 Issue:4 Volume:153 Page:405
ISSN:1350-245X
Container-title:IEE Proceedings - Vision, Image, and Signal Processing
language:en
Short-container-title:IEE Proc., Vis. Image Process.

Author:

Sung T.-Y.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Signal Processing

Link

https://digital-library.theiet.org/content/journals/10.1049/ip-vis_20045148?crawler=true&mimetype=application/pdf

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2. Standard IEEE P802.11a/D7.0‘Part II: Wireless LAN medium access control (MAC) and physical layer (PHY) specifications: high speed physical layer in the 5 GHz band’, , July, 1999

3. Fourier Transforms in VLSI

4. Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations

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