Parallel resultant elimination algorithm to solve the selective harmonic elimination problem-Reference-Cited by-同舟云学术

Parallel resultant elimination algorithm to solve the selective harmonic elimination problem

Published:2016-01 Issue:1 Volume:9 Page:71-80
ISSN:1755-4543
Container-title:IET Power Electronics
language:en
Short-container-title:IET Power Electronics

Author:

Yang Kehu¹,Chen Liangyu²,Zhang Jianjun¹,Hao Jun¹,Yu Wensheng³

Affiliation:

1. School of Mechanical, Electronic and Information EngineeringChina University of Mining and TechnologyBeijingPeople's Republic of China

2. Shanghai Key Laboratory of Trustworthy ComputingEast China Normal UniversityPeople's Republic of China

3. School of Electronics EngineeringBeijing University of Posts and TelecommunicationsPeople's Republic of China

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-pel.2015.0070

Reference33 articles.

1. Selected harmonic reduction in static DC‐AC inverters;Turnbull F.G.;IEEE Trans. Commun. Electron.,1964

2. Generalized techniques of harmonic elimination and voltage control in thyristor inverters, part 1: harmonic elimination;Hasmukh S.P.;IEEE Trans. Ind. Appl.,1973

3. VSC-Based D-STATCOM With Selective Harmonic Elimination

4. A Hybrid PWM Applied to High-Power Three-Level Inverter-Fed Induction-Motor Drives

5. A Large-Power Voltage Source Converter for FACTS Applications Combining Three-Level Neutral-Point-Clamped Power Electronic Building Blocks

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