1. 1995 Proc. Int. Symp. Low Power Design USA K. Usami M. Horowitz Clustered voltage scaling technique for low power design 3 8
2. Minimum energy tracking loop with embedded DC‐DC converter enabling ultra‐low‐voltage operation down to 250 mV in 65 nm CMOS;Ramadass Y.K.;IEEE J. Solid‐State Circuits,2008
3. 2010 Proc. IEEE Tencon 2010 Japan B. Maity P. Mandal A switched‐capacitor based embedded DC‐DC buck converter for high power efficiency and high power density 19 24
4. 2007 Proc. IEEE 2007 Power Electronics Specialists Conf. USA Y.K. Ramadass A.P. Chandrakasan Voltage scalable switched capacitor DC‐DC converter for ultra‐low power on‐chip applications 2353 2359
5. 2009 EECS Department University of California Berkeley M.D. Seeman A design methodology for switched‐capacitor DC‐DC converters 158 160