Offset-compensated switched-capacitor delay circuit that is insensitive to stray capacitance and to capacitor mismatch
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_19890423?crawler=true&mimetype=application/pdf
Reference8 articles.
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Integrated CMOS GSM baseband channel selecting filters realized using switched capacitor finite impulse response technique;Microelectronics Reliability;2006-05
2. Multiphase clock generators with controlled clock impulse width for programmable high order rotator SC FIR filters realized in 0.35 μm CMOS technology;SPIE Proceedings;2005-06-30
3. Offset- and gain-compensated and mismatch-free SC delay circuit with flexible implementation;Electronics Letters;1999
4. Chip Area Estimation for SC FIR Filter Structures in CMOS Technology;Mixed Design of Integrated Circuits and Systems;1998
5. Analog FIR filters with an oversampled Sigma - Delta modulator;IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing;1992
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