Radiation hardened high performance CMOS VLSI circuit designs
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
General Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/ip-g-2.1992.0048?crawler=true&mimetype=application/pdf
Reference53 articles.
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Study of total ionizing dose induced read bit errors in magneto-resistive random access memory;Microelectronics Reliability;2016-12
2. Single Event Effects on Static and Clocked Cascade Voltage Switch Logic (CVSL) Circuits;IEEE Transactions on Nuclear Science;2009-08
3. Theoretical considerations for SRAM total-dose hardening;IEEE Transactions on Nuclear Science;1995-04
4. Low-frequency noise characterisation of γ-irradiated silicon-on-insulator MOSFETs;Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms;1995-01
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