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Watermarking ICs for IP protection

  • Published:2002 Issue:6 Volume:38 Page:272
  • ISSN:0013-5194
  • Container-title:Electronics Letters
  • language:en
  • Short-container-title:Electron. Lett.

Author:

Newbould R.D.,Irby D.L.,Carothers J.D.,Rodriguez J.J.,Holman W.T.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Reference4 articles.

1. Chang, H.: ‘Surviving the SOC revolution: a guide to platform-based design’, (Kluwer Academic Publishers 1999), p. 1–17

2. Mixed signal design watermarking for IP protection

3. Technical trials and legal tribulations

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Satisfibility based Watermarking Approach for Hardware Security in High Level Synthesis;2023 IEEE 20th India Council International Conference (INDICON);2023-12-14

2. Facial Biometric for Securing Hardware Accelerators;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-01

3. IP Core Steganography Using Switch Based Key-Driven Hash-Chaining and Encoding for Securing DSP Kernels Used in CE Systems;IEEE Transactions on Consumer Electronics;2020-08

4. Enhanced Security of DSP Circuits Using Multi-Key Based Structural Obfuscation and Physical-Level Watermarking for Consumer Electronics Systems;IEEE Transactions on Consumer Electronics;2020-05

5. Scaling Logic Locking Schemes to Multi-module Hardware Designs;Architecture of Computing Systems – ARCS 2020;2020
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