Affiliation:
1. School of Electrical Engineering Iran University of Science and Technology Tehran Iran
Abstract
AbstractIn this letter, a new rail‐to‐rail two‐stage regenerative comparator for low supply voltage applications is presented. A rail‐to‐rail operation is achieved by utilizing an inverse inverter pre‐amplifier. The proposed comparator is post‐layout simulated within a standard 180‐nm CMOS technology. In the worst‐case scenario, the energy efficiency and the delay of the comparator are improved by more than 80% compared to the conventional single‐stage comparator.
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Reference5 articles.
1. A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure
2. A low settling time switching scheme for SAR ADCs with reset‐free regenerative comparator;Pahlavanzadeh H.;Int. J. Circuit Theory Appl.
3. An ultra low-voltage rail-to-rail comparator for on-chip energy harvesters
4. Rail‐to‐rail dynamic voltage comparator scalable down to pW‐range power and 0.15‐V supply;Aiello O.;IEEE Trans. Circuits Syst. II Express Briefs,2021
5. A High-Speed Low-Noise Comparator With Auxiliary-Inverter-Based Common Mode-Self-Regulation for Low-Supply-Voltage SAR ADCs