Publisher
Institution of Engineering and Technology (IET)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science
Reference14 articles.
1. Sharma, K.: ‘Programmable Logic Handbook, PLDs, CPLDs, & FPGAs’, 1st(McGraw-Hill, New York 1988)
2. Brayton, R.K., Hachtel, G.D., McMullen, C., and Sangiovanni-Vincentelli, A.L.: ‘Logic minimization algorithms for VLSI synthesis’, 1st(Kluwer Academic Publishers, Boston 1984)
3. De Micheli, G.: ‘Synthesis and optimization of digital circuits’, 1st(McGraw-Hill International, USA 1984)
4. Two-level logic synthesis on PALs
5. Multi-level synthesis on PALs
Cited by
12 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Switching Activity Reduction of SOP Networks;IEEE Access;2024
2. VLSI-based Logic Synthesis;Lecture Notes in Electrical Engineering;2022
3. Structural Decomposition in FSM Synthesis;Lecture Notes in Electrical Engineering;2020
4. Field Programmable Gate Arrays in FSM Design;Logic Synthesis for FPGA-Based Finite State Machines;2015-10-15
5. Background of Finite State Machines and Programmable Logic;Logic Synthesis for FPGA-Based Finite State Machines;2015-10-15