VLSI implementation of high‐throughput parallel H.264/AVC baseline intra‐predictor

Author:

Hsia Shih‐Chang1,Chou Ying‐Chao2

Affiliation:

1. Department of Electronics EngineeringNational Yunlin University of Science and TechnologyYunlinTaiwan

2. Department of Computer and CommunicationNational Kaohsiung First University of Science and TechnologyTaiwan

Funder

National Science Council

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Reference34 articles.

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5. Overview of the H.264/AVC video coding standard

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2. Enhanced pipelined architecture of H.264/AVC intra prediction;Signal Processing: Image Communication;2016-02

3. H.264/AVC high definition intra coding implementation on multiprocessor system on chip technology architecture;IET Computers & Digital Techniques;2015-09

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