New energy‐efficient hybrid wide‐operand adder architecture
Author:
Affiliation:
1. Department of Computer Engineering, Kerman BranchIslamic Azad UniversityKermanIran
2. Department of Computer EngineeringShahid Bahonar University of KermanKermanIran
3. INESC‐ID, Instituto Superior Tecnico (IST)University of LisbonLisbonPortugal
Funder
Fundação para a Ciência e a Tecnologia
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering,Control and Systems Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2019.0084
Reference33 articles.
1. Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style
2. Embedded Systems Design with Special Arithmetic and Number Systems
3. Residue Number Systems: A New Paradigm to Datapath Optimization for Low-Power and High-Performance Digital Signal Processing Applications
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