Flexible hardware approach to multi‐core time‐predictable systems design based on the interleaved pipeline processing
Author:
Affiliation:
1. Faculty of Automatic Control, Electronics and Computer ScienceSilesian University of Technologyul. Akademicka 1644‐100GliwicePoland
Funder
European Commission
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering,Control and Systems Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2019.0521
Reference35 articles.
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