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Iterative timing analysis based on nonlinear and interdependent flipflop modelling

  • Published:2012 Issue:5 Volume:6 Page:330
  • ISSN:1751-858X
  • Container-title:IET Circuits, Devices & Systems
  • language:en
  • Short-container-title:IET Circuits Devices Syst.

Author:

Chen N.,Li B.,Schlichtmann U.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Reference16 articles.

1. ‘The open source liberty library modeling format specification’, http://www.opensourceliberty.org/, accessed May 2012

2. Statistical Timing Analysis: From Basic Principles to State of the Art

3. First-Order Incremental Block-Based Statistical Timing Analysis

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1. Timing Analysis and Optimization Method with Interdependent Flip-Flop Timing Model for Near-Threshold Design;Electronics;2022-11-10

2. An Efficient Timing Model of Flip-Flops Based on Artificial Neural Network;2021 ACM/IEEE 3rd Workshop on Machine Learning for CAD (MLCAD);2021-08-30

3. TimingCamouflage+: Netlist Security Enhancement With Unconventional Timing;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-12

4. Accurate and Efficient Interdependent Timing Model for Flip-Flop in Wide Voltage Region;2019 17th IEEE International New Circuits and Systems Conference (NEWCAS);2019-06

5. EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration Under Process Variations;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2019-04
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